This invention relates to a method of manufacturing a semiconductor device, and more particularly, to a method of manufacturing a contact structure including a polycrystalline silicon (hereafter poly-Si) layer and a silicide layer.
A prior method of manufacturing a semiconductor device is described in "A New CMOS SRAM Cell with Fully Planarizing Technology", 1987 Symposium on VLSI Technology, Digest of Technical Papers pp. 103-104. This prior method includes a substantial number of steps including two steps of making contact holes, four steps of growing poly-Si in the contact holes, and two steps of etching back poly-Si layers. Moreover, in this method, when poly-Si is grown on a silicide layer, a thin oxide layer is formed incidentally between the poly-Si and the silicide layer. Therefore, an increased contact resistance between the poly-Si layer and the silicide layer is caused by the thin oxide layer.